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CAT1232LP/CAT1832
5V and 3.3V Supply Voltage Monitor and Reset Circuit
FEATURES
s Selectable reset voltage tolerance
DESCRIPTION
The CAT1232LP and CAT1832 microprocessor supervisors can halt and restart a "hung-up" or "stalled" microprocessor, restart a microprocessor after a power failure, and debounce a manual/push-button microprocessor reset switch. The devices are drop in replacements for the Maxim/Dallas Semiconductor DS1232LP and DS1832 supervisors Precision reference and comparator circuits monitor the 5V or 3.3V system power supply voltage, VCC. During power-up or when the power supply falls outside selectable tolerance limits, both the RESET and RESET become active. After the power supply voltage rises above the RESET threshold voltage, the reset signals remain active for a minimum of 250ms, allowing the power supply and system processor to stabilize. The trip-point tolerance input, TOL, selects the trip level tolerance to be either 5% or 10% for the CAT1232LP 5V supply and 10% or 20% for the CAT1832 3.3V supply. Each device has a push-pull, active HIGH reset output. The CAT1232LP also has an open drain, active LOW reset output while the CAT1832 also has a push-pull, active LOW reset output. A debounced manual reset input activates the reset outputs and holds them active for a minimum period of 250ms after being released. Also included is a watchdog timer to reset a microprocessor that has stopped due to a software or hardware failure. Three watchdog time-out periods are selectable: 150ms, 600ms and 1.2sec. If the ST input is not strobed low before the watchdog time out period expires, the reset signals become active for a minimum of 250ms.
-- CAT1232LP for 5V supply -- CAT1832 for 3.3V supply
s Selectable watchdog period:
150ms, 600ms or 1.2 sec
s Two reset outputs
-- Active high, push-pull reset output -- Active low, open-drain reset output (CAT1232LP) -- Active low, push-pull reset output (CAT1832)
s Debounced manual push-button reset s Compact SOIC and MSOP packages
APPLICATIONS
s Microprocessor Systems s Portable Equipment s Controllers s Single Board Computers s Instrumentations s Telecommunications
FUNCTIONAL DIAGRAM
VCC TOL VCC Reference 40k RESET PBRST TD ST Push Button Debounce Watchdog Timebase Selection Watchdog Transition Detector Reset & Watchdog Timer RESET (CAT1832) Tolerance Selection (CAT1232LP) RESET
+ -
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. 25089, Rev. A
CAT1232LP/CAT1832 ORDERING INFORMATION
Solder Plate Lead Finish Ordering Part Number CAT1232LP CAT1232LPS CAT1232LPS-2 CAT1232LPU CAT1232LPS-T13 CAT1232LPS-2T13 CAT1232LPU-T13 CAT1832 CAT1832S CAT1832U CAT1832S-T13 CAT1832U-T13 Green Sn Lead Finish Ordering Part Number CAT1232LPL CAT1232LPW CAT1232LPV CAT1232LPZ CAT1232LPW-T13 CAT1232LPV-T13 CAT1232LPZ-T13 CAT1832L CAT1832V CAT1832Z CAT1832V-T13 CAT1832Z-T13 Green NiPdAu Lead Finish Ordering Part Number CAT1232LPGL CAT1232LPGW CAT1232LPGV CAT1232LPGZ CAT1232LPGW-T13 CAT1232LPGV-T13 CAT1232LPGZ-T13 CAT1832GL CAT1832GW CAT1832GZ CAT1832GW-T13 CAT1832GZ-T13
Package 8-lead, DIP 16-lead, SOIC 8-lead, SOIC MSOP 16-lead, SOIC 8-lead, SOIC MSOP 8-lead, DIP 8-lead, SOIC MSOP 8-lead, SOIC MSOP
Parts per Tube 50 47 100 100 -- -- -- 50 100 100 -- --
Parts Per Reel -- -- -- -- 2,000 2,000 2,500 -- -- -- 2,000 2,500
Reel Size (inch) -- -- -- -- 13 13 13 -- -- -- 13 13
PIN CONFIGURATION
8-Lead SOIC/MSOP/DIP PBRST 1 TD 2 TOL 3 GND 4 8 VCC 7 ST 6 RESET 5 RESET
16-Lead SOIC NC PBRST NC TD NC TOL NC GND 1 2 3 4 5 6 7 8 16 NC 15 VCC 14 NC 13 ST 12 NC 11 RESET 10 NC 9 RESET
PIN DESCRIPTION
Pin Number Pin Number 8-Lead Package 16-Lead Package 1 2 2 4 Name PBRST TD Function Debounced manual pushbutton reset input Watchdog typical time delay selection: a) tTD = 150ms for TD = GND b) tTD = 600ms for TD = Open c) tTD = 1200ms for TD = VCC CAT1232LP TOL selects 5% (TOL = GND) or 10% (TOL = VCC) trip point tolerance. CAT1832 TOL selects 10% (TOL = GND) or 20% TOL = VCC) trip point tolerance. Ground Active HIGH reset output. RESET is active 1. If VCC falls below the reset voltage trip point 2. If PBRST is low 3. If ST is not strobed low before the timeout period set by TD expires. 4. During power-up. Active LOW reset output. (See RESET) Strobe Input Power Supply No internal connection
3
6
TOL
4 5
8 9
GND RESET
6 7 8
11 13 15 1, 3. 5, 7, 10, 12, 14, 16
RESET ST VCC NC
Doc. No. 25089, Rev. A
2
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT1232LP/CAT1832 ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC ....................................... -0.5V to 7.0V Voltage on ST and TD ................. -0.5V to VCC + 0.5V Voltage on PBRST, RESET and RESET ............................ -0.5V to VCC + 0.5V ELECTRICAL CHARACTERISTICS Unless otherwise stated, 1.0V VCC 5.5V and over the operating temperature range of -40C to +85C. All voltages are referenced to ground.
Symbol Parameter VCC ICC1 VIH VIL VCCTP VCCTP VCCTP VCCTP tTD tTD tTD VOH IOH IOL IIL RPU CIN COUT tPB tRST tST tRPD tF tPDLY tRPU tR Supply Voltage Supply Current ST and PBRST Input High Level ST and PBRST Input Low Level VCC Trip Point (TOL = GND) VCC Trip Point (TOL = VCC) VCC Trip Point (TOL = GND) VCC Trip Point (TOL = VCC) Watchdog Time-Out Period Watchdog Time-Out Period Watchdog Time-Out Period Output Voltage Output Current Output Current Input Leakage Internal Pull-Up Resistor Input Capacitance Output Capacitance PBRST Manual Reset Minimum Low Time Reset Active Time ST Pulse Width VCC Fail Detect to RESET or RESET VCC Slew Rate PBRST Stable LOW to RESET and RESET Active VCC Detect to RESET or RESET Inactive VCC Slew Rate
(4)
Maximum Junction Temperature ...................... 125C Storage Temperature Range ............ -65C to +150C Lead Soldering Temperature (10 sec) .............. 300C Operating Temperature Range ........... -40C to +85C
Conditions VCC = 5.5V, CAT1232LP VCC = 3.6V, CAT1832
(5) (6)
Min 1.0
Typ 35 20
Max 5.5 50 35 VCC + 0.3V 0.8
Units V A V V
2 VCC - 0.4V - 0.3
VCC = 5.5V, CAT1232LP VCC = 3.6V, CAT1832 CAT1232LP CAT1232LP CAT1832 CAT1832 TD = GND TD = VCC TD floating I = - 500A(3) Output =
(1) (1)
0.5 4.50 4.25 2.80 2.47 62.5 500 250 VCC - 0.5V 4.62 4.37 2.88 2.55 150 1200 600 VCC - 0.1V - 350 10 - 1.0 32 40 1.0 55 5 7 4.74 4.49 2.97 2.64 250 2000 1000 V V V V ms ms ms V A mA A k pF pF ms 600 5 20 20 1000 8 ms ns s s ms ms ns
2.4V(2)
Output = 0.4V,
PBRST = VIL
20 250 20
tRISE = 5s 4.25V to 4.75V
250 0
600
1000
Notes: (1) PBRST is internally pulled HIGH to VCC through a nominal 40k resistor (RPU). (2) RESET is an open drain output on the CAT1232LP. (3) RESET remains within 0.5V of VCC on power-down until VCC falls below 2V. RESET remains within 0.5V of ground on power-down until VCC falls below 2.0V.
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
(4) Must not exceed the minimum watchdog time-out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be strobed. (5) Measured with VCC 2.7V. (6) Measured with VCC < 2.7V.
Doc. No. 25089, Rev. A
3
CAT1232LP/CAT1832 TYPICAL CHARACTERISTICS
For the CAT1232LP, VCC = 5V and TAMB = 25C unless otherwise stated. Threshold Voltage vs. Temperature (10% TOL)
THRESHOLD VOLTAGE (V)
Threshold Voltage vs. Temperature (5% TOL)
THRESHOLD VOLTAGE (V)
4.630 4.625 TOL = GND (5%) 4.620 4.615 4.610 -50
4.450 4.445 TOL = Vcc (10%) 4.440 4.435 4.430 -50 0 50 100 TEMPERATURE (C)
0
50
100
TEMPERATURE (C)
Supply Current vs. Temperature
40 30 20 10 0 -50 Vcc = 5.5V Vcc = 4.5V
Reset Active Time vs. Temperature
800
RESET ACTIVE TIME (ms)
SUPPLY CURRENT (A)
700 600 500 400 300 -50 Vcc = 5.5V
TD = open
Vcc = 4.5V
0
50
100
0
50
100
TEMPERATURE (C)
TEMPERATURE (C)
Reset Active Time Waveform
Transient Response
Doc. No. 25089, Rev. A
4
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT1232LP/CAT1832 APPLICATION INFORMATION
SUPPLY VOLTAGE MONITOR Reset Signal Polarity and Output Stage Structure RESET is an active LOW signal. It is developed with an open drain driver in the CAT1232LP. A pull-up resistor is required, typical values are 10k to 50k. The CAT1832 uses a CMOS push-pull output stage for the RESET. RESET is an active High signal developed by a CMOS push-pull output stage and is the logical opposite to RESET. Trip Point Tolerance Selection The TOL input is used to select the VCC trip point threshold. This selection is made connecting the TOL input to ground or VCC. Connecting TOL to Ground makes the VCC trip threshold 4.62V for the CAT1232LP and 2.88V for the CAT1832. Connecting TOL to VCC makes the VCC trip threshold 4.37V for the CAT1232LP and 2.55V for the CAT1832. After VCC has risen above the trip point set by TOL, RESET and RESET remain active for a minimum time period of 250ms. On power-down, once VCC falls below the reset threshold the RESET outputs will remain active and are guaranteed valid down to a VCC level of 1.0V.
Tolerance Select Voltage CAT1232LP TOL = VCC CAT1232LP TOL = GND CAT1832 TOL = VCC CAT1832 TOL = GND
Trip Point Tolerance 10 % 5% 20 % 10 %
Trip Point Voltage (V) MIN 4.25 4.50 2.47 2.80 NOMINAL 4.37 4.62 2.55 2.88 MAX 4.49 4.74 2.64 2.97
tR VCCTP(MAX) VCCTP
tF VCC VCCTP(MAX) VCCTP
VCCTP(MIN)
VCCTP(MIN)
VCC
tRPU RESET VOH
RESET
tRPD
VOL
RESET
RESET
VOH VOL
Figure 1. Timing Diagram: Power Up
Figure 2. Timing Diagram: Power Down
Manual Reset Operation Push-button input, PBRST, allows the user to issue reset signals. The pushbutton input is debounced and is pulled high through an internal 40k resistor. When PBRST is held low for the minimum time of 20 ms, both resets become active and remain active for a minimum time period of 250ms after PBRST returns high.
No external pull-up resistor is required, since PBRST is pulled high by an internal 40k resistor. PBRST can be driven from a TTL or CMOS logic line or short-ed to ground with a mechanical switch.
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
5
Doc. No. 25089, Rev. A
CAT1232LP/CAT1832
WATCHDOG TIMER AND ST INPUT A watchdog timer stops and restarts a microprocessor that has stopped proper operation or become "hung". The watchdog performs this function by monitoring the ST input. After the reset outputs go inactive the ST input must be strobed with a high-to-low signal transition prior to the minimum watchdog timeout period. However if the ST input is not strobed with a high-to-low signal transition prior to a watchdog timeout the reset outputs will become active for TRST reseting and restarting the microprocessor. Once the resets return to the inactive state the watchdog timer restarts the process. The TD input allows the user to select from three predetermined watchdog timeout periods. Always use the minimum timeout period to determine the required frequency of ST high-to-low transitions and the maximum to determine the time prior to the reset outputs becoming active. ST pulse widths must be 20ns or greater. The watchdog timer cannot be disabled. It must be strobed with a high-to-low signal transition to avoid a watchdog timeout and subsequent reset.
TD Voltage Level GND Floating VCC Watchdog Time-out Period (ms) MIN 62.5 250 500 NOMINAL 150 600 1200 MAX 250 1000 2000
3.3V CAT1832 1 2 3 4 PBRST TD TOL GND VCC ST RESET RESET 8 7 6 5 RESET I/O
P
Figure 4. CAT1832 Application Circuit: Pushbutton Reset
CAT1232LP 1 2 3 4 PBRST TD TOL GND VCC ST RESET RESET 8 7 6 5
5V
MREQ 10k P RESET Address Bus Decoder
Figure 5. CAT1232LP Application Circuit: Watchdog Timer
PBRST
tPB tPDLY VIL tRST tRST RESET VOH VOL RESET VIH ST
Valid Strobe
Valid Strobe
Invalid Strobe
tST tTD (Min) tTD (Min)
RESET RESET
Note: ST is ignored whenever a reset is active.
Figure 6. Timing Diagram: Pushbutton Reset
Figure 7. Timing Diagram: Strobe Input
Doc. No. 25089, Rev. A
6
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
CAT1232LP/CAT1832 PACKAGE MECHANICAL 16-LEAD WIDE BODY SOIC (300mil)
0.2914 (7.40) 0.2992 (7.60)
0.394 (10.00) 0.419 (10.65)
0.3977 (10.10) 0.4133 (10.50) 0.0926 (2.35) 0.1043 (2.65) 0.050 (1.27) BSC
0.010 (0.25) X 45 0.029 (0.75) 0.0091 (0.23) 0.0125 (0.32) 0 -8 0.016 (0.40) 0.050 (1.27)
0.013 (0.33) 0.020 (0.51)
0.0040 (0.10) 0.0118 (0.30)
Notes: 1. Complies with JEDEC publication 95 MS-013 dimensions; however, some dimensions may be more stringent. 2. All linear dimensions are in inches and parenthetically in millimeters.
8-LEAD DIP (300mil)
0.245 (6.17) 0.295 (7.49)
0.355 (9.02) 0.400 (10.16) 0.120 (3.05) 0.150 (3.81) 0.180 (4.57) MAX
0.300 (7.62) 0.325 (8.26)
0.015 (0.38) -- 0.100 (2.54) BSC 0.045 (1.14) 0.060 (1.52) 0.014 (0.36) 0.022 (0.56)
0.110 (2.79) 0.150 (3.81) 0.310 (7.87) 0.380 (9.65)
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
7
Doc. No. 25089, Rev. A
CAT1232LP/CAT1832 PACKAGE MECHANICAL 8-LEAD MSOP
0.0150 0.0110 0.38 0.28
0.1970 0.1890
5.00 4.80
S
0.0256 [0.65] BSC 0.0433 [1.10] MAX. 0.1220 0.1142 3.10 2.90 0.0374 0.0295 0.95 0.75
0.0059 0.0020 0.039 [0.10] MAX. S
0.15 0.05
S 0.0276 0.0157 0.70 0.40
0.1220 0.1142
3.10 2.90
0 - 6
8-LEAD Narrow Body SOIC (150mil)
0.1497 (3.90) 0.1574 (4.00)
0.2294 (5.90) 0.2440 (6.20)
0.1990 (4.90) 0.1969 (5.00) 0.0926 (2.35) 0.1043 (2.65) 0.050 (1.27) BSC 0.013 (0.33) 0.020 (0.51)
0.0099 (0.25) X 45 0.0196 (0.75) 0.0075 (0.19) 0.0099 (0.25) 0 -8 0.016 (0.40) 0.050 (1.27)
0.0040 (0.10) 0.0099 (0.25)
Doc. No. 25089, Rev. A
8
(c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
REVISION HISTORY
Date 06/13/2005 07/26/2005 Revision Comments 00 A Initial Issue Update Electrical Characteristics Add Typical Characteristics
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Publication #: Revison: Issue date:
25089 A 07/26/05

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